New Ways to VRM Modelling & Decoupling

Achieve reliable system performance - Speed up design cycles - Reduce cost
Exclusive 1-day Simulation and Design Workshop with Steve Sandler

Steve Sandler

Steve is the founder and chief engineer of AEi Systems LLC and CEO of Picotest.
He is an internationally renowned author and expert for power integrity and power supply design.
His knowledge is based on over 35 years’ experience in the design and analysis of power conversion equipment for military and space applications.

Workshop Overview

The Voltage Regulator Module (VRM) is a fundamental element in the power distribution network (PDN) with system level consequences heavily impacting power integrity. Very few, if any, manufacturers provide high fidelity VRM models and much of the data required to construct your own model is not published.

In this compact one day workshop you will be guided through all measurement and simulation steps required to generate a measurement based VRM model. Each theory step is followed by practical measurements performed in small groups.

This workshop introduces a measurement based, non-linear VRM model that simulates very quickly while supporting both, switching and AC characteristics. The model includes PSRR and input impedance, including negative resistance, as well as VRM output impedance and supports effects of decoupling capacitors as well as PCB influences via EM simulation.

Thursday, November 3rd, 2016

08:30 - 17:00

Microchip Application Center
Osterfeldstraße 82
85737 Ismaning (Munich)

How to get there? Click here to 
download the direction map

Workshop price: € 249,- net including:

Target Audience
Experienced power electronics engineers and anybody concerned about demanding power supply for cores, voltage references, clocks, signal chains and ADCs.

Seat Limitation
Due to the combination of theory and hands-on demonstrations, the number of seats is limited. Seats will be awarded based on “first come first served” basis.

Workshop Content Details

  • Introduction to power integrity and the role of the VRM, the printed circuit board and the decoupling
    • Why flat impedance is so important
    • How high in frequency do we need to measure?  (Not as high as you might think for the VRM designer)
    • Why we use frequency domain and not time domain measurements
    • How the VRM design can cost the system engineers time and money
  • S-parameters, capacitor measurement and parameter extraction 
    • What are S-parameters and why we use them
    • Most of what you think you know about capacitors is wrong
    • Measuring capacitors and saving to touchstone
    • Extracting a broadband (SPICE compatible) capacitor model
  • VRM characteristics and extraction of a measurement based model
    • Voltage mode vs current mode
    • Feedback amplifiers, compensation, Bode, Nyquist and NISM
    • The two (3) critical measurements – PSRR and Output impedance (and PSGFS)
    • Creating a simulation model from the measurements
  • A simple guide to printed circuit board decoupling and how the VRM can make life difficult
    • The 3 methods of decoupling (Big V, MPD and FLAT)
    • The art and science of getting power from point A to point B
    • Decoupling is not just about high power FPGA’s
    • Why some FPGA’s require hundreds of decoupling capacitors and others only need a few

Feel free to download the event flyer: