10th Power Analysis & Design Symposium 2021 (VIRTUAL)

Meanwhile it is common knowledge that MLCC Class II ( X7R, X5R) loose significant capacitance with DC-Bias. Beside this fact, net capacitance depends also on temperature, frequency, time (aging) and AC-ripple. Newer investigations show that the latter and the DC-Bias compensate instead of superimpose. The presentation contains the latest state of information on the topic.

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In the semiconductor industry, new technologies such as SIC and GAN are becoming increasingly dominant. This enables higher switching speeds to be achieved and high-frequency applications to be realized. Lower switching losses and less chip area are a major advantage of these both technologies. However, the passive electronic components must compensate this advantage by better filter effects or new types of magnetic materials. This does not mean lower power-losses or a reduction in the size of the components. The detailed measurement-based characterization of the passive components is and will be an essential part in the development of the components in the future. The MSPM Power GmbH has been engaged in the exact measurement-based-characterization of passive components in power electronic applications for several years now. An essential part of the investigations is the measurement-based-determination of power dissipation and the measurement-based-detection of parasitic effects in passive electronic components.

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Have you ever tried to combine a RF-Signal and DC without you messing everything up? For example meanwhile designing a satellite LNB or video system. We have been looking into different components to compare already well known with unconventional ones and get the best design approach out of it. Come along and follow us on the journey from low to high frequency and low to high current.

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A single LAN cable adapter connects the DC-DC converter with the Bode 100 measurement. This enables easy and robust test setups on the bench and in thermal chambers. A simple LAN patch cable is the only connection needed. Bode measurement performance, schematics and layout of the system is shown.  In addition step load tests with an active step load on the DUT test adapter can be conducted. Good engineering practice of DC-DC loop compensation using Bode and step load measurements will be shown.

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Fundamentals of noise coupling in electronic circuits are surprisingly straight forward if we look at the physics behind electron movement and interaction. In this session Dr Ali Shirsavar from Biricha will go through the principles of noise coupling in order to convey a deep understanding of PCB layout techniques. Instead of large mathematical equations, simple experiments are used to show how noise is coupled and how we should layout our pcb to avoid this coupling.

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Brick DC-DC converters are widely used in data center, telecommunication, automotive and aerospace applications, converting 48 V down to voltages such as 3.3 V, 5 V, 9 V, 12 V or 15 V. There is a continuous push towards higher power density while high performance loads increasingly affect power integrity. In this lecture a Gallium-Nitrite (eGaN) based, non-isolated, interleaved 300 W 16th brick power module is introduced, supporting up to 25 A output current at output voltages of 12 V at a maximum power density of 730 W/in³. The digital control system, implemented on a dsPIC33C® DSC, is used to fully exploit the high performance of eGaN FETs in fast switching Intermediate Bus Converter (IBC) applications. The digital feedback loop implementation is based on a PWM-steering scheme ensuring high-speed current balancing while providing high bandwidth response minimizing the size of the energy storage between converter and down-stream power distribution segment. The loop control further supports tuning of the converter output impedance to the total effective ESR of the decoupling capacitance. This allows end-users to tune the converter for an existing design rather than modifying the load to support the power module.

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Modern systems present many challenges including the trifecta of high-speed signal integrity, power integrity and EMI. Separate engineers are generally responsible for each of these domains, while each engineer focuses on his specialty. The shortfall of this approach lies in the fact that these domains interact with each other and so cannot be designed, characterized or evaluated independently, at least not without consideration. In this session, we will consider the performance issues that are unintentionally created by each individual engineer and present a holistic methodology for successful design. This will include, but not be limited to, the intersection between power electronics and power integrity.

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